Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-03-22
2005-03-22
Chase, Shelly A (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
06871309
ABSTRACT:
A method and apparatus for verifying that redundant circuits are truly redundant is provided. Extra circuitry is included within the integrated circuit to test the features of a chip. Without testing of the redundant fictions on the circuit, true redundancy of the functions contained on the chip are not known. Tests are conducted through the extra circuitry to determine if the functions within the chip are independently operational. The extra circuitry may also be used to trim the circuitry within the chips. The extra circuitry consists of pins and switches coupled to nodes within the circuit to allow testing of the redundant functional blocks.
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patent: 4821271 (1989-04-01), Kini et al.
patent: 4903270 (1990-02-01), Johnson et al.
patent: 6546511 (2003-04-01), Sim et al.
Merchant & Gould P.C.
National Semiconductor Corporation
Sullivan Timothy P.
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