Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1996-11-12
1999-11-09
Hafiz, Tariq R.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
39550005, 39550034, 39550044, 714 30, 714 46, 714724, G06F 1100
Patent
active
059830174
ABSTRACT:
A virtual monitor controller includes a data storage device coupled to receive and output data; an instruction storage device coupled to receive and output instructions; a status storage device coupled to receive and output status data; and a mode storage device coupled to receive and output mode data. The virtual monitor controller is included in a debugger/monitor controller. A debugger/monitor system comprises a host system; the debugger/monitor controller; and a digital processor. Preferably, the controller is coupled between the processor and IC logic. A method of operating a virtual monitor comprises the steps of intercepting an instruction fetch from a microprocessor; downloading instructions from a host computer; and operating the microprocessor with the instructions. Preferably, the instructions are sequentially downloaded.
REFERENCES:
patent: 5228039 (1993-07-01), Knoke et al.
patent: 5287460 (1994-02-01), Olsen et al.
patent: 5325368 (1994-06-01), James
patent: 5355369 (1994-10-01), Greenberger
patent: 5386565 (1995-01-01), Tanaka et al.
patent: 5428624 (1995-06-01), Blair et al.
patent: 5434804 (1995-07-01), Bock et al.
patent: 5440723 (1995-08-01), Arnold et al.
patent: 5455936 (1995-10-01), Maemura
patent: 5479652 (1995-12-01), Dreyer et al.
patent: 5483518 (1996-01-01), Whetsel
patent: 5488688 (1996-01-01), Gonzales et al.
patent: 5590354 (1996-12-01), Klapproth et al.
patent: 5704034 (1997-12-01), Circello
patent: 5708773 (1998-01-01), Jeppesen et al.
patent: 5737516 (1998-04-01), Circello et al.
patent: 5768152 (1998-06-01), Battaline et al.
Winters, M. "Using IEEE-1149.1 For In-Circuit Emulation," Conference Record of WESCON/94, Idea/Microelectronics, pp. 525-528, Sep. 1994.
Chenoweth et al. "Embedding Virtual Test Points in PCBs," Conference Record of WESCON/94, Idea/Microelectronics, pp. 529-533, Sep. 1994.
Kemp Steven R.
Poeppleman Alan D.
Whitehill Clifford A.
Dam Tuan Q.
Hafiz Tariq R.
LSI Logic Corporation
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