Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2011-04-05
2011-04-05
Trimmings, John P (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S030000, C714S036000, C714S718000, C714S724000, C714S726000, C714S727000, C714S729000, C714S734000, C714S738000, C714S741000, C365S200000, C365S201000, C365S185010, C711S102000, C711S103000, C716S030000, C716S030000
Reexamination Certificate
active
07921346
ABSTRACT:
A method, system and computer program product for testing the Design-For-Testability/Design-For-Diagnostics (DFT/DFD) and supporting BIST functions of a custom microcode array. Upon completion of the LSSD Flush and Scan tests, the ABIST program is applied to target the logic associated direct current (DC) and alternating current (AC) faults of ABIST array Design-For-Testability/Design-For-Diagnostics DFT/DFD functions that support the microcode array. A LSSD test of the DFT functional combinational logic is performed by applying generated LSSD deterministic test patterns targeting the ABIST design-for-test faults to determine if the DFT supporting the microcode array is functioning correctly. Additional tests may be terminated upon resulting failure of the applied ABIST DFT circuitry surrounding the arrays.
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Forlenza Donato Orazio
Forlenza Orazio Pasquale
Robbins Bryan J.
Tran Phong T.
Dillon & Yudell LLP
International Business Machines - Corporation
Trimmings John P
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