VLCT programmation/read protocol

Details VLCT programmation/read protocol VLCT programmation/read protocol

2006-06-07

2008-10-28

Trimmings, John P (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S030000, C714S031000, C714S025000, C714S718000, C714S724000, C714S734000, C714S730000

Reexamination Certificate

active

07444573

ABSTRACT:
An integrated circuit with built-in self test enables internal data registers to be written to or read from via an external tester. In a command phase the programmable built-in self test unit receives a command, an address and a data transfer count. The address specifies the initial data register address. The data transfer count corresponds to the amount of data transferred and the number of cycle in the data access phase. The data access phase begins by accessing the data register corresponding to the address from the command phase. During subsequent cycles of the data access phase, the external tester accesses sequential data registers. The programmable built-in self test unit includes a pointer register and an adder to update the address each cycle of the data phase.

REFERENCES:
patent: 5640509 (1997-06-01), Balmer et al.
patent: 5661732 (1997-08-01), Lo et al.
patent: 6108798 (2000-08-01), Heidel et al.
patent: 6553527 (2003-04-01), Shephard, III
patent: 7168005 (2007-01-01), Adams et al.
patent: 2002/0194545 (2002-12-01), Abbott

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