LandOfFree - US Patents - Listing for Error detection/correction and fault detection/recovery,Pulse or data error handling,Digital logic testing

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Tester-compatible timing translation system and method using tim

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Patent

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Testing a circuit with compressed scan chain subsets

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing a multibank memory module

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing a processor using a random code generator

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing a programmable logic device with embedded fixed...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing a transceiver

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing an embedded core

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing an integrated circuit using dedicated function pins

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing an operation of integrated circuitry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing and burn-in of IC chips using radio frequency transmissi

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Patent

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Testing and burn-in of IC chips using radio frequency transmissi

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Patent

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Testing and burn-in of IC chips using radio frequency...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing apparatus and testing method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing apparatus and testing method for an integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing apparatus and testing method for an integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing circuit split between tiers of through silicon...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing frequency hopping devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Testing functional boundary logic at asynchronous clock...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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