Testing apparatus and testing method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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C714S724000

Reexamination Certificate

active

07549099

ABSTRACT:
A testing apparatus includes a logic comparing unit for comparing the output value with a predetermined expectation value; a pass/fail determining module for determining pass/fail of the device under test based on the comparison result of the logic comparing unit; and a clock generating circuit including a first phase comparing unit for comparing phase of the output data of the device under test with that of the reproduced clock and outputting a first comparison result signal; a second phase comparing unit for comparing phase of the reference clock with that of the reproduced clock and outputting a second comparison result signal; and a reproduced clock generating module for generating the reproduced clock based on the first and second comparison result signals.

REFERENCES:
patent: 6285722 (2001-09-01), Banwell et al.
patent: 6462996 (2002-10-01), Ooishi
patent: 6794913 (2004-09-01), Stengel
patent: 7058865 (2006-06-01), Mori et al.
patent: 2003/0007586 (2003-01-01), Ishii
patent: 55164947 (1980-12-01), None
patent: 2003-98233 (2003-04-01), None
patent: 2003-227864 (2003-08-01), None
patent: 2003-344507 (2003-12-01), None
International Search Report issued in International Application No. PCT/JP2005/004370 mailed on Jun. 14, 2005, 1 page.

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