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System for at-speed automated testing of high serial pin...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for at-speed automated testing of high serial pin...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for dynamic re-allocation of test pattern data for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for efficient utilization of multiple test systems

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for flexible embedded Boundary Scan testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for identifying valid connections between electrical...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for measuring characteristics of a digital signal

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for performing automatic test pin assignment for a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for reducing test data volume in the testing of logic...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for test data storage reduction

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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System for testing an integrated circuit using multiple test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for testing fast synchronous digital circuits,...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for testing IC chips selectively with stored or...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for testing real and simulated versions of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for verifying signal timing accuracy on a digital...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System for verifying the effectiveness of a RAM BIST controller'

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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System initialization of microcode-based memory built-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System level IC testing arrangement and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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System pulse latch and shadow pulse latch coupled to output...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System to reduce programmable range specifications for a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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