Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
1999-02-26
2001-10-30
Chung, Phung M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S734000
Reexamination Certificate
active
06311301
ABSTRACT:
FIELD OF THE INVENTION
This invention pertains to the field of testing electrical printed circuit boards, and more particularly, to a system for the efficient utilization of multiple test systems to test electrical printed circuit boards.
BACKGROUND OF THE INVENTION
Electrical printed circuit (PC) boards are typically manufactured in a complex, highly automated process. Multiple horizontal layers of metal electrical conductors, or traces, are sandwiched between insulating layers and interconnected with vertical connections known as vias. Electrical components, including passive electrical devices (such as resistors, capacitors, inductors, etc.) and active electrical devices (such as digital integrated circuits, A/D converters, operational amplifiers, etc.) may then be connected to the printed circuit board by soldering the components to pads on the surface of the PC board or into holes drilled through the board.
The completed PC boards must then be tested for a number of possible defects. This testing typically verifies that the traces, vias, and connectors in the blank PC board are acceptable and that the proper components are on the PC board in their correct locations, oriented correctly, and appropriately soldered in place. Some typical defects include:
Missing components: one or more required components are not present on the board;
Wrong components: one or more components are of incorrect value (e.g. 33K ohm resistor instead of a 3.3K ohm resistor), or are of incorrect type (e.g. a digital PCI controller is placed where a digital SCSI controller should be);
Open solder joints: one or more electrical connections between the PC board and a device on the board failed to solder properly so there exists no electrical connection between the PC board and one or more device pins;
Solder shorts: an undesirable electrical connection exists between two locations on the PC board due to an improper soldering process;
Insufficient solders: an unreliable electrical connection exists such that physical stresses such as those caused by dropping the board or exposing it to thermal extremes may possibly (over time) cause the joint to fail.
Testing the completed PC boards is a difficult process since many PC boards perform numerous functions and include a large number of components. Furthermore, many of the electrical conductors are buried inside the PC board, rendering a visual inspection (VI) impossible. Relying solely on functional tests, consisting of applying power and causing the PC board to perform all possible functions, is generally inefficient and wasteful for several reasons. Functional tests are slow since it takes time to cycle through all functions, the location of defects is not precisely identified, and if power is applied to a defective PC board many expensive components may be destroyed, compounding the defects. Therefore, since visual and functional tests are not generally sufficient, other specialized testing equipment may be used to test the PC board.
A variety of independent mechanisms may be employed to test the PC board for failures. Some of these techniques are:
Automated optical inspections (AOI): a computer-controlled system employing devices such as digital cameras, etc.;
Automated x-ray inspections (AXI): a computer-controlled x-ray system;
Electrical process test inspections: a computer-controlled measurement system (typically, but not limited to, a type of system referred to as an in-circuit test (ICT) system).
No inspection system can guarantee a high probability of detecting and locating all possible types of defects. Additionally, the problem is made worse by virtue of the fact that the probability of detection of defects by the various systems can be lessened by a number of factors such as the complexity of the circuitry on the PC board, the size of the PC board, and the quality of the individual tests employed to look for the defects. For this reason, manufacturers may employ several different types of test systems in the inspection process. By doing this, manufacturers hope to have a high probability of detection for all of their common defects.
In employing multiple systems, manufacturers have no means for analyzing the defect-detection capability of each system for each of the potential defects on a given PC board. Therefore, a significant amount of cost is incurred due to the inefficiency of employing two or more types of systems that are inspecting for the same defect. For example, if a manufacturer employs an automated optical inspection (AOI) system, an automated x-ray inspection (AXI) system, and an in-circuit test system (ICT) for a particular board, all three systems will spend considerable time and money looking for the same defects (e.g. solder opens, etc.). The expense of this process can be considerable due not only to the amount of time spent by the various systems in duplication of effort, but also in the costs associated with programming the systems, creating fixtures to connect the PC board to the test systems, maintenance and alignment of the systems, etc. As PC boards become more complex and components are increasingly miniaturized, fixtures become more costly, heavy, complex, and unreliable.
For example, an in-circuit tester includes a test bed for holding a completed PC board. The PC board is generally screwed down to the test bed to provide a good connection between the electrical ground on the PC board and the ground on the ICT. A two-dimensional array of electrical probes, or “bed of nails,” must then be adapted to contact exposed electrical conductors on the PC board. A fixture must be designed and fabricated to provide this interface between the bed of nails and the PC board conductors, since the ICT nails are generally not in the correct location and are too widely spread to directly probe the PC board. A typical fixture consists of a flat insulating board with connectors on one side to connect with the nails extending from the ICT. Precisely positioned probes extend from the other side of the fixture to contact nodes on the PC board. (A node is a junction point within a network, such as the electrical connection between two or more component pins. Each node may have several probing locations, such as at the two or more component pins.) Extensive wiring is required in the fixture to connect each nail to the right probe. The design and fabrication of a fixture is a major and costly part of the test development process. As electronics become more widely used and more complex, testing difficulties are exacerbated, and a need to improve PC board testing methods and reduce the costs of designing and fabricating fixtures becomes more urgent.
A need therefore exists for a system to efficiently test electrical printed circuit boards on multiple test systems, reducing the redundancy of the tests and speeding them up while keeping a high probability of detecting defects. A further need exists to reduce the cost, complexity, size and weight of the fixtures needed to connect electrical printed circuit boards to the test systems.
SUMMARY
To assist in achieving the aforementioned needs, the inventors have devised a system for the efficient utilization of multiple test systems.
A method for developing a test procedure to test an electrical circuit board on multiple test systems having features of the present invention comprises: providing a description of an electrical circuit board having a plurality of elements connected thereto; identifying a subset of the plurality of elements on the electrical circuit board to be tested on a first test system, wherein the first test system is capable of testing the subset of the plurality of elements for defects; creating a first test process to test the subset of the plurality of elements on the first test system; storing the first test process on a medium readable by the first test system; identifying a remainder of the plurality of elements on the electrical circuit board to be tested on at least one other test system, wherein the at least one other test system is capable of testing the remainder of t
Dudfield Anne
Monterio Patricia
Oresjo Stig
Posse Kenneth E.
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