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Serial I/O using JTAG TCK and TMS signals

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Serial interface device built-in self test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Serial scan chain control within an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Serial to parallel conversion circuit having a shift clock...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Serialization of hardware and software debug data

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Serializer/de-serializer bus controller interface

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Serializer/deserializer circuit for jitter sensitivity...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Series equivalent scans across multiple scan topologies

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Shift register, data line driving circuit, scanning line...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Shift register, data line driving circuit, scanning line...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Shift register, scanning line driving circuit, matrix type...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Short circuited capacitor detection in AC coupled links...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Shrink test mode to identify Nth order speed paths

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Signal conditioning system for controlling data retrieval channe

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Signal measurement apparatus and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Signal processing apparatus having non-volatile memory and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Signal sampling with sampling and reference paths

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Signal testing of integrated circuit chips

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Signature compression circuit and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Simplified high speed test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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