Serializer/de-serializer bus controller interface

Details Serializer/de-serializer bus controller interface Serializer/de-serializer bus controller interface

2006-11-01

2009-10-27

Ellis, Kevin L (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C365S201000, C324S765010

Reexamination Certificate

active

07610532

ABSTRACT:
An application specific integrated circuit (ASIC) uses a dedicated interface between core logic and an independent Serializer/De-serializer bus (SBus) to provide SBus capabilities to the core logic. In addition to the dedicated interface, the ASIC includes a controller responsive to a set of signals and a plurality of receivers distributed about the SBus. Each of the receivers is responsive to a set of commands that can be reused to test logic and support functions across each revision of the ASIC as well as to test separate ASICs with similar arrangements of support functions without requiring the generation of a distinct scan vector to test the ASIC. Additional interfaces, such as an I.E.E.E. 1149.1 interface, further extend SBus capabilities to external test equipment.

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