Memory implementation for handling integrated circuit...
Memory integrity self checking in VT/TU cross-connect
Memory interface device and method for supporting debugging
Memory model for functional verification of multi-processor...
Memory self-test via a ring bus in a data processing apparatus
Memory system with dynamic timing correction
Memory test device and method capable of achieving fast...
Memory test system for peak power reduction
Memory tester
Memory tester tests multiple DUT's per test site
Memory tester uses arbitrary dynamic mappings to serialize...
Memory testing method
Memory-mounting integrated circuit and test method thereof
Merged memory and logic (MML) integrated circuits including buil
Merged MISR and output register without performance impact...
Meta-data driven test-data generation with controllable...
Method and a unit for programming a memory
Method and apparatus characterizing AC parameters of a field...
Method and apparatus for a scannable hybrid flip flop
Method and apparatus for a special stress mode for N-NARY...