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Method for determining the impact on test coverage of scan...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for determining the optimum locations for scan...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for diagnosing bridging faults in integrated circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for diagnosing bridging faults in integrated circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for diagnosing failures using invariant analysis

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for early failure recognition in power semiconductor modu

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for embedded integrated end-to-end testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for ensuring mutual exclusivity of selected signals durin

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for finding the root cause of the failure of a faulty...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for generating a Shmoo plot contour for integrated circui

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for generating test pattern for semiconductor...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for generating test patterns

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for generating, from a test cube set, a generator...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for IC fault analysis using programmable built-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for identifying an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for identifying long paths in integrated circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Method for identifying SMP bus transfer errors

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Method for identifying the cause of yield loss in integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for implementing a bist scheme into integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method for implementing deterministic based broken scan...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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