Method for determining the impact on test coverage of scan...

Details Method for determining the impact on test coverage of scan... Method for determining the impact on test coverage of scan...

2006-11-21

2006-11-21

Lamarre, Guy (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07139948

ABSTRACT:
In one embodiment of the present invention, a scan test methodology is implemented which generates a test pattern set. A linear-time analysis is then performed on the test pattern set. As a result a new test pattern set is generated. Comparisons are made between the original test pattern set and the new test pattern set to analyze any difference in faults detected by the original test pattern set and the new test pattern set. If there are any differences in faults, test pattern generation is performed using the new test pattern set and the original test pattern set is used to augment the new test pattern set.

REFERENCES:
patent: 5574733 (1996-11-01), Kim

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