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Delay fault test circuitry and related method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Delay fault testing with IEEE 1149.1

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Delay management system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Delay-fault testing method, related system and circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Delayed processing of site-aware objects

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Delta time event based test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Design for test of analog module systems

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Design for test of analog module systems

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Deskewed differential detector employing analog-to-digital...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Detecting communication errors across a chip boundary

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Detecting corruption of configuration data of a programmable...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Detecting interport faults in multiport static memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Detection circuit and method for AC coupled circuitry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Determining a length of the instruction register of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Determining and reporting data accessing activity of a program

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Determining edge relationship between clock signals

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Determining the health of a desired node in a multi-level...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Determining timing associated with an input or output of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Deterministic bist architecture including MISR filter

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Deterministic BIST architecture tolerant of uncertain scan...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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