Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-12-27
2005-12-27
Chase, Shelly (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S700000
Reexamination Certificate
active
06981192
ABSTRACT:
A pin electronics circuit for automatic test equipment includes first and second sampling circuits for sampling first and second legs of a differential signal produced by a DUT (Device Under Test). Timing signals activate the first and second sampling circuits to sample the legs of the differential signal at precisely defined instants of time to produce first and second collections of samples. To deskew the legs of a differential signal with respect to each other, corresponding features within the first and second collections are identified and a difference is taken between them. The differential skew can then be applied to correct measurements of differential signals.
REFERENCES:
patent: 6052810 (2000-04-01), Creek
patent: 6057716 (2000-05-01), Dinteman et al.
patent: 6281699 (2001-08-01), Bishop
patent: 6714888 (2004-03-01), Mori et al.
Chase Shelly
Teradyne Legal Department
Teradyne, Inc.
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