Package map data outputting circuit of semiconductor memory...
Packet type integrated circuit memory devices having pins assign
Parallel access testing of a memory array
Parallel compression test circuit of memory device
Parallel test circuit and method for wide input/output DRAM
Parallel test circuit for memory device
Parallel test circuit for semiconductor memory
Parallel test circuit of a semiconductor memory device
Parallel test for asynchronous memory
Parallel test for asynchronous memory
Parallel tester capable of high speed plural parallel test
Parallel TESTMODE
Parallel threshold voltage margin search for MLC memory...
Periphery stress test for synchronous RAMs
Phase change random access memory and method of testing the...
Process monitoring for ferroelectric memory devices with...
Process of making and a DRAM standby charge pump with oscillator
Program check for a non-volatile memory
Programmable bias for a memory array
Programmable built-in self test (BIST) data generator for...