LandOfFree - US Patents - Listing for Error detection/correction and fault detection/recovery,Pulse or data error handling,Digital logic testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for scan testing digital circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for scan testing dynamic circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for scanning free-running logic

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for secure scan testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for securing digital information on an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for selective scan chain diagnostics

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for selectively compacting test responses

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for selectively compacting test responses

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for selectively enabling and disabling...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for selectively testing identical pins of a

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for selectively utilizing information...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for semiconductor integrated circuit...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for soft-error immune and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for storing and using chipset built-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for structured profiling of data processing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for swapping state data with scan cells

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for system monitoring with reduced...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for test and repair of marginally...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Method and apparatus for test data generation