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Method and apparatus for performing on-chip function checks and

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for performing partial unscan and near full

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for performing register transfer level...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for performing scan testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for probing a computer bus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for profile-based reordering of program por

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for programmable LBIST channel weighting

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for programmable logic device (PLD)...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for providing full accessibility to...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for providing JTAG functionality in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for PVT controller for programmable on...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for random stimulus generation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for random stimulus generation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for random stimulus generation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for random stimulus generation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for reducing number of transitions...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for reducing number of transitions...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for reducing power dissipation in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for reducing the current consumption of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for reducing the time required to test an i

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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