Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2004-07-08
2008-03-04
Britt, Cynthia (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S798000, C714S056000, C324S754090
Reexamination Certificate
active
07340656
ABSTRACT:
The subject invention facilitates the efficient operation of the disassembly of the microprocessor bus by providing an apparatus and method for detecting and correcting a strobe phase inversion and predrive filtering in a 2× source synchronous data transfer bus. Apparatus according to the subject invention detects a data strobe inversion in a source synchronous 2× data bus and corrects for this inversion by reordering the received data as well as filtering predrive effects in real time. Specifically, this apparatus according to the subject invention monitors bus traffic in a multiprocessor environment and correctly captures all double data rate exchanges regardless of the source IC or destination IC in the system.
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patent: 2006/0064615 (2006-03-01), Dervisoglu et al.
patent: 244926 (1987-11-01), None
Fenton James M.
Markozen Gene L.
Taylor Kevin
Britt Cynthia
Lenihan Thomas F.
Tektronix Inc.
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