Method and apparatus for reducing the current consumption of...

Details Method and apparatus for reducing the current consumption of... Method and apparatus for reducing the current consumption of...

2006-01-10

2006-01-10

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

06986088

ABSTRACT:
The invention relates to a method for reducing the current consumption of an electronic circuit having at least one test module for testing the electronic circuit. The test module is connected to at least one line and/or a connection of the electronic circuit. A test control signal is generated, by means of which the test module is at least partially decoupled from the line or the connection in an operating mode of the electronic circuit such that switching currents are prevented in the test module.

REFERENCES:
patent: 5248937 (1993-09-01), Höolzle
patent: 6216248 (2001-04-01), Mc Connell et al.
patent: 41 07 172 (1992-09-01), None
patent: 00253283 (2000-01-01), None
Author not listed: “Double Data Rate (DDR) SDRAM Specification”, JEDEC Solid State Technology Association, Jun. 2000, pp. 1-10.
Tietze, U. et al.: “Halblelter-Schaltungstechnik” [Semiconductor Circuitry], Springer Verlag, 1986, p. 215.

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