Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-03-28
2006-03-28
Tan, Vibol (Department: 2819)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S725000, C714S727000, C326S030000, C326S032000
Reexamination Certificate
active
07020818
ABSTRACT:
Embodiments include an on die termination circuit. The on die termination circuit may be programmable. The on die termination circuit may be programmed to compensate for environmental conditions and the physical characteristics of the device. The programmed on die termination circuit allows for faster transfer rates over communication lines by reducing the time needed to recover from signal reflection and similar issues.
REFERENCES:
patent: 6380758 (2002-04-01), Hsu et al.
patent: 6445316 (2002-09-01), Hsu et al.
patent: 6624659 (2003-09-01), Abraham et al.
patent: 2004/0225830 (2004-11-01), DeLano
Cheng Roger K.
Dour Navneet
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Tan Vibol
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