Concurrently programmable dynamic memory built-in self-test...
Configurable IC with error detection and correction circuitry
Configurable integrated circuit and method of testing the same
Configurable memory architecture with built-in testing...
Configurable memory design for masked programmable logic
Configurable scan path structure
Configuration and method for storing the test results...
Configuration control in a programmable logic device using non-v
Configuration for generating signal impulses of defined...
Configurator arrangement and approach therefor
Configuring flash memory
Connecting analog response to separate strobed comparator...
Connection matrix for a microcontroller emulation chip
Connection of auxiliary circuitry to tap and instruction...
Connection of auxiliary circuitry to tap and instruction...
Context save and restore using test scan chains
Continuous application and decompression of test patterns to...
Continuous application and decompression of test patterns to...
Control circuit for releasing residual charges
Control register bus access through a standardized test access p