Read/write memory device with an embedded read-only pattern and
Read/write memory with improved test mode data compare
Real-time adaptive SRAM array for high SEU immunity
Reconfigurable built-in self test circuit
Recording of result information in a built-in self-test...
Reduced pin count stress test circuit for integrated memory devi
Redundancy analysis for embedded memories with built-in self tes
Redundancy test method for a semiconductor memory
Redundant memory structure using bad bit pointers
Redundant memory structure using bad bit pointers
Refresh characteristic testing circuit and method for...
Refresh sampling built-in self test and repair circuit
Reliability test method and circuit for non-volatile memory
Reliability test method for a ferroelectric memory device
Repair circuit for integrated circuits
Repairing advanced-memory buffer (AMB) with redundant memory...
Reprogrammable addressing process for embedded DRAM
Response time measurement
Roll call tester
ROM embedded mask release number for built-in self-test