Static information storage and retrieval – Read/write circuit – Testing
Patent
1998-01-09
1999-09-28
Nelms, David
Static information storage and retrieval
Read/write circuit
Testing
G11C 700
Patent
active
059599120
ABSTRACT:
A read-only memory (ROM) embedded mask release number for a built-in self-test of a memory device is provided. A synchronous dynamic random access memory (10) comprises a conventional memory (12) and a built-in self-test arrangement (14). The built-in self-test arrangement (14) includes a read only memory (ROM) (72) which stores a plurality of algorithms. Each algorithm is comprised of a series of array access instructions (140) and program access instructions (142). The last instruction in ROM (72) is an idle instruction (120). Associated with idle instruction (120) is an identification number (132). Once stored in ROM (72), the identification number (132) can be read without the use of additional equipment.
REFERENCES:
patent: 4419747 (1983-12-01), Jordan
patent: 4451903 (1984-05-01), Jordan
patent: 5103166 (1992-04-01), Jeon et al.
patent: 5258986 (1993-11-01), Zerbe
patent: 5506959 (1996-04-01), Cockburn
patent: 5642307 (1997-06-01), Jernigan
patent: 5675545 (1997-10-01), Madhavan et al.
patent: 5787174 (1998-07-01), Tuttle
patent: 5818772 (1998-10-01), Kuge
Cline Danny R.
Hii Kuong Hua
Loh Wah Kit
Powell Theo J.
Donaldson Richard L.
Hoel Carlton H.
Holland Robby T.
Nelms David
Phung Anh
LandOfFree
ROM embedded mask release number for built-in self-test does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with ROM embedded mask release number for built-in self-test, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and ROM embedded mask release number for built-in self-test will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-711313