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Using thin undoped TEOS with BPTEOS ILD or BPTEOS ILD alone...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Utilizing amorphorization of polycrystalline structures to...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
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UV-blocking etch stop layer for reducing UV-induced charging...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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UV-blocking layer for reducing UV-induced charging of SONOS...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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UV-programmed P-type Mask ROM and fabrication thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vanishingly small integrated circuit diode

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vapor phase growth of a dielectric film and a fabrication proces

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Variable threshold voltage double gated transistors and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Variable width offset spacers for mixed signal and system on...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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VDMOS transistor protected against over-voltages between...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Versatile system for cross-lateral junction field effect...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
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Versatile system for limiting electric field degradation of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Versatile system for optimizing current gain in bipolar...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Versatile system for triple-gated transistors with...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical 8F2 cell dram with active area self-aligned to bit...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical bipolar SRAM cell, array and system, and a method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical bipolar transistor formed using CMOS processes

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical channel transistor and method of fabricating the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical channel transistor structure and manufacturing...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical conducting power semiconductor devices implemented...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
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