LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene architecture electronic storage and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene double-gate FET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene double-gate MOSFET with vertical channel regions

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene formation of borderless contact MOS transistors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene gate electrode method for fabricating field effect...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene gate multi-mesa MOSFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene gate process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Damascene gate process with sacrificial oxide in...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene isolation of CMOS transistors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Damascene method for source drain definition of silicon on insul

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene NiSi metal gate high-k transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene NVRAM cell and method of manufacture

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Damascene pattering of SOI MOS transistors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate

Damascene process for a T-shaped gate electrode

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene process for carbon memory element with MIIM diode

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene process for carbon memory element with MIIM diode

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene process for forming ferroelectric capacitors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Damascene process for forming ultra-shallow source/drain extensi

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate

Damascene tri-gate FinFET