Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-08-15
2006-08-15
Wilczewski, Mary (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S261000, C438S288000, C438S624000, C438S637000, C438S672000, C438S740000, C438S954000
Reexamination Certificate
active
07091088
ABSTRACT:
A method of protecting a charge trapping dielectric flash memory cell from UV-induced charging, including fabricating a charge trapping dielectric flash memory cell in a semiconductor device; depositing over the charge trapping dielectric flash memory cell at least one UV-protective layer; forming at least one layer over the at least one UV-protective layer; and etching the at least one layer to form an opening therein with an etchant species selective to stop on a layer below the at least one UV-protective layer, wherein the UV-protective layer comprises a substantially UV-opaque material.
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Product Data Sheet; Ceraset™ Polyureasilazane; Product Sheet Issue Date: Jan. 19, 2001.
Cheng Ning
Ferguson Clarence B.
Lingunis Emmanuil H.
Ngo Minh Van
Reiss Joerg
Renner , Otto, Boisselle & Sklar, LLP
Spansion LLC
Thomas Toniae M.
Wilczewski Mary
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