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Zero cost non-volatile memory cell with write and erase...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

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Zero power memory cell with improved data retention

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Zero thermal budget manufacturing process for MOS-technology pow

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Zero threshold voltage pFET and method of making same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Zirconium and/or hafnium oxynitride gate dielectric

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Zirconium and/or hafnium silicon-oxynitride gate dielectric

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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ZPROM manufacture and design and methods for forming thin struct

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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