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Rad Hard MOSFET with graded body diode junction and reduced...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Radiation hardened field oxide for VLSI sub-micron MOS device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Radiation hardened semiconductor memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Radiation hardened semiconductor memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Radiation-hard silicon cryo-CMOS process suitable for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Charge transfer device
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Radiation-hard, low power, sub-micron CMOS on a SOI substrate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Radical oxidation and/or nitridation during metal oxide...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Radical oxidation for bitline oxide of SONOS

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Radical processing of a sub-nanometer insulation film

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Raised silicide source/drain MOS transistors having enlarged...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Raised source and drain process with disposable spacers

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Raised source/drain process by selective SiGe epitaxy

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Raised source/drain using recess etch of polysilicon

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Raised STI process for multiple gate ox and sidewall...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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RAM

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Random access memory (RAM) capacitor in shallow trench...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Random access memory cell and method for fabricating same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Rapid thermal anneal with a gaseous dopant species

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Rapid thermal anneal with a gaseous dopant species for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Rapid thermal annealing with absorptive layers for thin film tra

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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