Vertical bipolar transistor formed using CMOS processes

Details Vertical bipolar transistor formed using CMOS processes Vertical bipolar transistor formed using CMOS processes

2005-02-22

2005-02-22

Pham, Hoai (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S203000, C438S207000

Reexamination Certificate

active

06858486

ABSTRACT:
A vertical bipolar transistor is described which utilizes ion implantation steps which are used to form an nMOS field effect device and a pMOS field effect device. The implantation steps form an n-well, a channel stop p-well region and emitter region which are vertically oriented within a semiconductor substrate. The resulting bipolar device is junction isolated from other circuits formed on the substrate by a p-well region.

REFERENCES:
patent: 6030864 (2000-02-01), Appel et al.

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