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P-channel dynamic flash memory cells with ultrathin tunnel...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Packing density for flash memories

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pad stack with a poly SI etch stop for TEOS mask removal with RI

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pair of FETs including a shared SOI body contact and the...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Parallel and series-coupled transistors having gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Parasitic surface transfer transistor cell (PASTT cell) for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Partial recrystallization of source/drain region before...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Partial silicidation method to form shallow source/drain junctio

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Partial silicide gate in sac (self-aligned contact) process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Partial vertical memory cell and method of fabricating the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Partially depleted SOI field effect transistor having a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Passivated silicon carbide devices with low leakage current...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Passivated tiered gate structure transistor and fabrication...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
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Passivation of nitride spacer

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Passivation of wide band-gap based semiconductor devices...

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Passivation scheme for LCD and other applications

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Passivation structure for flash memory and method for...

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Pattern density control using edge printing processes

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pattern density control using edge printing processes

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Pattern formation method and method of manufacturing display...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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