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Biased, triple-well fully depleted SOI structure, and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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BiCMOS integration scheme with raised extrinsic base

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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BiCMOS process for forming double-poly MOS and bipolar transisto

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bidirectional horizontal charge transfer device and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Charge transfer device
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Bidirectional split gate NAND flash memory structure and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bidirectional trench gated power mosfet with submerged body bus

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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BiDMOS semiconductor device and method of fabricating the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bilayer deposition to avoid unwanted interfacial reactions...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bimetallic oxide compositions for gate dielectrics

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bipolar transistor and method for making same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bipolar transistor compatible with CMOS utilizing tilted ion...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bipolar transistor for an integrated circuit having variable...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bipolar transistor for an integrated circuit having variable...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bipolar transistor formed by a high energy ion implantation meth

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bipolar transistor manufacturing

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bipolar transistor produced using processes compatible with...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bipolar transistor which can be controlled by field effect...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bipolar transistor with an inhomogeneous emitter in a BICMOS...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Bipolar transistor with collector having an epitaxial Si:C...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
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Bipolar transistor with graded base layer

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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