Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1997-11-13
2001-01-30
Pham, Long (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S309000, C438S344000, C438S345000, C438S349000, C438S350000, C438S365000, C438S367000, C438S368000, C438S370000, C438S375000, C438S377000, C438S378000, C438S482000, C438S491000, C438S525000, C438S530000, C438S532000, C438S545000, C438S548000, C438S558000, C438S559000, C438S564000
Reexamination Certificate
active
06180442
ABSTRACT:
BACKGROUND OF THE INVENTION 1. FIELD OF THE INVENTION
The present invention relates to a line of fabrication of integrated circuits containing, in particular, bipolar and complementary MOS (CMOS) components. This type of line is generally called a BICMOS line.
SUMMARY OF THE INVENTION
The present invention can provide a line in which the dimensions of an element designed on a mask can be of a dimension lower than or equal to 0.4 &mgr;m, for example, from 0.2 to 0.35 &mgr;m.
More specifically, the present invention provides a line in which the properties of NPN-type bipolar transistors are optimized.
The present invention provides a method for fabricating a bipolar transistor of NPN type, including the steps of forming an N-type epitaxial layer on a P-type substrate, a buried layer being provided at least at the location of the bipolar transistor; forming a thick oxide layer open at the base-emitter location of the bipolar transistor; forming a first P-type doped polysilicon or amorphous silicon layer and a second encapsulation oxide layer; opening these last two layers at the center of the base-emitter region of the bipolar transistor; diffusing the doping contained in the first silicon layer in the underlying epitaxial layer, to form the extrinsic base of the bipolar transistor, during which step a thin oxide layer forms on the apparent silicon surfaces; depositing a first layer of silicon nitride, depositing a second layer of polysilicon, and anisotropically etching the second polysilicon layer to leave in place spacers in the vertical portions thereof; removing the apparent silicon nitride and overetching it under the spacers; removing the thin oxide layer at the locations where the apparent silicon nitride has been overetched; implanting an N-type collector doping; implanting a P-type doping to form the intrinsic base of the bipolar transistor; depositing a third highly-doped N-type polysilicon layer so that it penetrates into the overetched area under the spacers and etching it anisotropically to leave it in place in this overetched area; and depositing a fourth N-type doped polysilicon layer and diffusing the doping contained in the third and fourth layers to form the emitter of the bipolar transistor.
According to an embodiment of the present invention, the first silicon nitride layer has a thickness of around 50 nm.
According to an embodiment of the present invention, the spacers have a base length of around 200 nm and the overetching of the silicon nitride layer is performed across a width of around 100 nm.
According to an embodiment of the present invention, the third polysilicon layer is doped to about 10
20
at./cm
3
and is from 10 to 100 times as doped as the fourth polysilicon layer.
According to an embodiment of the present invention, this method includes the step of depositing a second silicon nitride layer between the first P-type doped polysilicon or amorphous silicon layer and the second encapsulation oxide layer.
These and other features and advantages of the present invention, will be discussed in detail in the following non-limiting description of specific embodiments of the present invention, in relation with the accompanying drawings.
REFERENCES:
patent: 4215418 (1980-07-01), Muramatsu
patent: 4276543 (1981-06-01), Miller et al.
patent: 4338138 (1982-07-01), Cavaliere et al.
patent: 4339767 (1982-07-01), Horung et al.
patent: 4752589 (1988-06-01), Schaber
patent: 4799098 (1989-01-01), Ikeda et al.
patent: 4829015 (1989-05-01), Schaber et al.
patent: 4931407 (1990-06-01), Maeda et al.
patent: 4957874 (1990-09-01), Soejima
patent: 4958213 (1990-09-01), Eklund et al.
patent: 4960726 (1990-10-01), Lechaton et al.
patent: 4965217 (1990-10-01), Desilets et al.
patent: 4975381 (1990-12-01), Taka et al.
patent: 4980302 (1990-12-01), Shimizu
patent: 5008207 (1991-04-01), Blouse et al.
patent: 5015594 (1991-05-01), Chu et al.
patent: 5045484 (1991-09-01), Yamada et al.
patent: 5047357 (1991-09-01), Ecklund
patent: 5061645 (1991-10-01), Nakazato et al.
patent: 5089429 (1992-02-01), Hsu
patent: 5100815 (1992-03-01), Tsubone et al.
patent: 5128271 (1992-07-01), Bronner et al.
patent: 5137840 (1992-08-01), Desilets et al.
patent: 5171702 (1992-12-01), Prengle et al.
patent: 5192992 (1993-03-01), Kim et al.
patent: 5238850 (1993-08-01), Matsunaga et al.
patent: 5286667 (1994-02-01), Lin et al.
patent: 5302535 (1994-04-01), Imai et al.
patent: 5321650 (1994-06-01), Kikuchi et al.
patent: 5354699 (1994-10-01), Ikeda et al.
patent: 5395782 (1995-03-01), Ohkoda et al.
patent: 5403758 (1995-04-01), Yoshihara
patent: 5416031 (1995-05-01), Miwa
patent: 5429959 (1995-07-01), Smayling
patent: 5439832 (1995-08-01), Nakamura
patent: 5457062 (1995-10-01), Keller et al.
patent: 5471083 (1995-11-01), Ikeda et al.
patent: 5471085 (1995-11-01), Ishigaki et al.
patent: 5478760 (1995-12-01), Yang
patent: 5488003 (1996-01-01), Chambers et al.
patent: 5489547 (1996-02-01), Erdeljac et al.
patent: 5494836 (1996-02-01), Imai
patent: 5504018 (1996-04-01), Sato
patent: 5523245 (1996-06-01), Imai
patent: 5541124 (1996-07-01), Miwa et al.
patent: 5547893 (1996-08-01), Sung
patent: 5563762 (1996-10-01), Leung et al.
patent: 5599723 (1997-02-01), Sato
patent: 5633181 (1997-05-01), Hayashi
patent: 5643806 (1997-07-01), Miwa et al.
patent: 5648279 (1997-07-01), Imai
patent: 5665615 (1997-09-01), Anmo
patent: 5705410 (1998-01-01), Guegan
patent: 5719082 (1998-02-01), Violette
patent: 5726069 (1998-03-01), Chen et al.
patent: 5753957 (1998-05-01), Watabe
patent: 5766999 (1998-06-01), Sato
patent: 5773349 (1998-06-01), Ham
patent: 5880000 (1999-03-01), Gris
patent: 5953600 (1999-09-01), Gris
patent: 5970333 (1999-10-01), Gris
patent: 0 495 329 A2 (1992-07-01), None
patent: 0 581 475 A1 (1994-02-01), None
patent: 0 606 001 (1994-07-01), None
patent: 0 746 032 A2 (1996-12-01), None
patent: 361290762 (1986-12-01), None
patent: 361290763 (1986-12-01), None
patent: 361290761 (1986-12-01), None
patent: 361283167 (1986-12-01), None
patent: 404250631 (1992-09-01), None
patent: WO 98/05071 (1998-02-01), None
Patent Abstracts of Japan, vol. 015, No. 114 (E-1047) & JP-A-03 004538 (Toshiba Corp.), Jan. 10, 1991.
Patent Abstracts of Japan, vol. 018, No. 171 (E-1529) & JP-A-05 343613 (Yamaha Corp.), Dec. 24, 1993.
Patent Abstracts of Japan, vol. 95, No. 1 & JP-A-06 291262 (Sony Corp.), Oct. 18, 1994.
IBM Technical Disclosure Bulletin, “Simplified Bipolar in Bo-CMOS,” vol. 33, No. 7, Dec. 1990, pp. 401-402, New York, US.
Scharf, B., “BICMOS Process Design For Mixed-Signal Applications,” Proceedings Of The International Symposium on Circuits and Systems, San Diego, May 10-13, 1992, vol. 6, pp. 2683-2686, Institute of Electrical and Electronics Engineers.
French Search Report from French Patent Application 96 14409, filed Nov. 19, 1996.
Proceedings Of The Bipolar/BiCMOS Circuits and Technology Meeting, Minneapolis, Oct. 7-8, 1992. Institute of Electrical and Electronics Engineers, pp. 96-99, Hayden, J.D., et al. “An Ultra-Shallow Link Base For A Double Polysilicon Bipolar Transistor”.
Galanthay Theodore E.
Morris James H.
Pham Long
SGS-Thomson Microelectronics S.A.
Wolf, Greenfield & Sacks, P.
LandOfFree
Bipolar transistor with an inhomogeneous emitter in a BICMOS... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bipolar transistor with an inhomogeneous emitter in a BICMOS..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bipolar transistor with an inhomogeneous emitter in a BICMOS... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2438210