Bidirectional split gate NAND flash memory structure and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S257000, C438S258000, C438S261000, C438S262000, C438S264000, C438S287000, C438S288000, C438S622000, C438S672000, C257SE21679, C257SE21681

Reexamination Certificate

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07544569

ABSTRACT:
A split gate NAND flash memory structure is formed on a semiconductor substrate of a first conductivity type. The NAND structure comprises a first region of a second conductivity type and a second region of the second conductivity type in the substrate, spaced apart from the first region, thereby defining a channel region therebetween. A plurality of floating gates are spaced apart from one another and each is insulated from the channel region. A plurality of control gates are spaced apart from one another, with each control gate insulated from the channel region. Each of the control gate is between a pair of floating gates and is capacitively coupled to the pair of floating gates. A plurality of select gates are spaced apart from one another, with each select gate insulated from the channel region. Each select gate is between a pair of floating gates.

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C.Y. Shu et al., Split-Gate NAND Flash Memory At 120 nm Technology Node Featuring Fast Programming And Erase, 2004 Symposium, VLSI Technology Digest of Technical Papers, pp. 78-79.

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