Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-09-05
2003-11-04
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S235000, C438S309000, C438S312000, C438S341000, C438S369000, C438S343000
Reexamination Certificate
active
06642096
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the manufacturing of junction components intended to be very fast and thus especially requiring a very thin base. The junction can be a homo-junction or a hetero-junction, that is, a junction between regions formed of a same semiconductor or of distinct semiconductors. More specifically, the present invention relates to the manufacturing of bipolar transistors with a silicon emitter and collector and a base formed by a silicon epitaxy (homo-epitaxy) or a silicon-germanium epitaxy (hetero-epitaxy).
2. Discussion of the Related Art
Upon formation of such a bipolar transistor, a P-type doped base is formed by epitaxy, on a single-crystal silicon semiconductor substrate of a first conductivity type, for example, N. In subsequent anneals, the P-type doping atoms, generally boron, tend to diffuse from the base layer, on the one hand, towards the underlying substrate (collector) and, on the other hand, towards the superposed emitter. It is thus difficult to obtain a base which is thin and heavily doped.
To enable reduction of the base thickness and, more specifically, to avoid the boron atoms placed in the base at the time of its formation diffuse into the underlying collector, it has been provided in unpublished French patent application No. 9,912,115 filed on Sep. 29, 1999 by France Télécom and the Commissariat à l'Energie Atomique, to implant carbon atoms into a silicon-germanium base.
It is indeed known that carbon atoms substitute to interstitial silicon atoms more easily than dopant atoms such as boron and limit the diffusion of boron.
However, the carbon must be implanted into the silicon-germanium base. Its implantation is thus performed at relatively high doses and powers (for example, 1015 atoms/cm
2
under 35 keV). Such an implantation creates many defects in the crystal lattice structure of the base. To enable reorganization of the lattice and totally “repair” such defects, the structure would have to be submitted to a relatively long anneal at a high temperature, which is impossible if the diffusion of boron is desired to be limited. The base thus inevitably has many crystal defects, which adversely affects the transistor performance. Such defects also appear in the case of a homo-junction transistor having a silicon base.
SUMMARY OF THE INVENTION
The present invention thus aims at providing a novel bipolar transistor manufacturing method which enables obtaining a thin and heavily-doped base.
The present invention also aims at such a method which enables obtaining a relatively homogeneous base with no defects.
To achieve these and other objects, the present invention provides a method of manufacturing a bipolar transistor in a single-crystal silicon substrate of a first conductivity type, including a step of carbon implantation at the substrate surface followed by an anneal step, before forming by epitaxy the transistor base in the form of a single-crystal semiconductor multilayer including at least a lower layer, a heavily-doped median layer of the second conductivity type, and an upper layer that contacts a heavily-doped emitter of the first conductivity type.
According to an embodiment of the present invention, the step of carbon implantation at the substrate surface includes implanting a dose of from 2 to 8.10
14
atoms/cm
2
at a power lower than 20 keV, preferably ranging between 2 and 10 keV.
According to an embodiment of the present invention, the method further includes the steps of:
defining an emitter window;
depositing a conductive material to fill up the window, etching it and forming spacers at the periphery of the conductive material;
forming in the substrate, on either side of the window, an extrinsic base area; and
annealing.
According to an embodiment of the present invention, the step of defining the emitter window includes the steps of:
depositing a first insulating layer;
depositing a second insulating layer selectively etchable with respect to the first layer; and
etching the first and second insulating layers to partially expose a selected region of the upper layer.
According to an embodiment of the present invention, the first insulating layer is silicon oxide and the second insulating layer is silicon nitride.
According to an embodiment of the present invention, the multilayer is made of silicon.
According to an embodiment of the present invention, the multilayer includes germanium.
According to an embodiment of the present invention, the lower layer is a silicon-germanium layer of a thickness on the order of 20 nm; the median layer is a silicon-germanium layer of a thickness on the order of 10 nm; and the upper layer is a silicon or silicon-germanium layer of a thickness on the order of 15 nm.
The present invention also provides a bipolar hetero-junction transistor, including a collector buried in a silicon substrate, a silicon base multilayer formed by epitaxy on the substrate and underlying a silicon emitter, the substrate surface further including an area in which carbon atoms are present.
According to an embodiment of the present invention, the multilayer includes germanium.
The foregoing objects, features and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments, in conjunction with the accompanying drawings.
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Liefing R. et al., “Improved Device Performance By Multistep Or Carbon Co-Implants” IEEE Transactions on Electron Devices, US, IEEE Inc. New York, vol. 41, No. 1, 1994, pp. 50-55.
Lanzerotti L. D. et al., “Suppression of Boron Outdiffusion in Sige HBTS by Carbon Incorporation”, International Electron Devices Meeting (IEDM), US, New York, IEEE, Dec. 8, 1996, pp. 249-252.
Knoll D. et al., “Comparison of SiGe and SiGe:C heterojunction bipolar transistors” Thin Solid Filsm, Elsevier-Sequoia S.A. Lausanne, CH, vol. 369, No. 1-2, Jul. 2000, pp. 342-346.
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Chantre Alain
Dutartre Didier
Jouan Sébastien
Marty Michel
McClellan William R.
Morris James H.
Smith Matthew
STMicroelectronics S.A.
Wolf Greenfield & Sacks P.C.
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