Search
Selected: All

Two-print two-etch method for enhancement of CD control...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Two-step etching process for forming self-aligned contacts

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Two-step MOSFET gate formation for high-density devices

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ultra high density series-connected transistors formed on...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ultra narrow lines for field effect transistors

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ultra short transistor channel length dictated by the width...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ultra thin spacers formed laterally adjacent a gate conductor re

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Ultra-low sheet resistance metal/poly-si gate for deep sub-micro

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Undulated moat for reducing contact resistance

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Use of amorphous carbon for gate patterning

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Use of selective ozone teos oxide to create variable...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Use of voids between elements in semiconductor structures...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Using implantation method to control gate oxide thickness on...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Vertical pillar transistor

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Wiring method

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Y-gate formation using damascene processing

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Zero interface polysilicon to polysilicon gate for flash memory

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0
  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.