Wiring method

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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C438S585000

Reexamination Certificate

active

11156578

ABSTRACT:
A method of forming a wiring in a thin-film transistor includes a step of providing a bank having a groove defined thereon, a step of placing a liquid material in a wiring formation area of the by depositing droplets of the liquid material, and a step of placing the liquid material in a secondary area. The groove has the wiring formation area and the secondary area that are contiguously connected with each other. The liquid material contains a structural material for the wiring. The per unit amount of the liquid material placed in the secondary area is smaller than the per unit amount of the liquid material deposited in the wiring formation area.

REFERENCES:
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patent: 6994422 (2006-02-01), Park et al.
patent: 2004/0137159 (2004-07-01), Nakamura et al.
patent: 2004/0201048 (2004-10-01), Seki et al.
patent: 2005/0003640 (2005-01-01), Ushiyama et al.
patent: 2005/0153468 (2005-07-01), Gupta et al.
patent: 2005-268761 (2005-09-01), None
patent: 10-2003-0082261 (2003-10-01), None
patent: 10-2004-0044113 (2004-05-01), None
Hayes et al., Development and Application by Ink-Jet Printing of Advanced Packaging Materials, 1999 International Symposium on Advanced Packaging Materials, pp. 88-93.

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