Undulated moat for reducing contact resistance

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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Details

C438S197000, C438S303000, C438S585000, C438S595000, C438S652000, C438S655000

Reexamination Certificate

active

06780742

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention relates generally to the field of electronic devices and more particularly to a semiconductor device having reduced contact resistance.
BACKGROUND OF THE INVENTION
Without limiting the scope of the invention, its background is described in connection with semiconductor manufacturing and is best exemplified by methods and processes for fabricating semiconductor devices.
Consumers of computers and other electronic devices that are operated by semiconductor chips typically desire products that process information faster than previous devices. One limiting factor of semiconductor chip process speed is how quickly electric current travels through a particular semiconductor device. Current travels more slowly through a device that has high electrical resistance in comparison to current speed through a device that has a lower resistance. Therefore, if regions of high electrical resistance in a device are reduced, the device will become faster.
One area of high resistance in a semiconductor device is a contact. Contacts are usually metallic or semi-metallic pads that electrically connect internal semiconductor components to external power sources. Much effort has been directed toward reducing the contact resistance of semiconductor devices. Most of this effort, however, has been spent developing new alloys for contacts that inherently have less electrical resistance than conventional materials that are currently used to fabricate contacts. Using new alloys for contacts detrimentally increases costs because additional materials, some of which are exotic and expensive, add to the total cost of the device and can increase the comnplexity of the fabrication process.
Semiconductor device fabrication often utilizes a salicide process. A salicide process is a self-aligned silicidation process. In a silicidation process, a metal, such as titanium, is placed into contact with silicon and heated. Heating of the titanium and silicon causes the silicon and titanium to combine to form a silicide compound. Silicidation is conventionally used to provide a conductive contact between silicon in a semiconductor device and a metal contact, which may be connected to a conductive lead. The resulting silicon-silicide-metal combination provides less contact resistance than provided with a direct metal-to-silicon contact. Large contact resistance is generally detrimental to the performance of a semiconductor device. A silicidation process is self-aligned, or a salicide process, when masking is not required to deposit the metal used to form the silicide compound.
A problem with the use of titanium in a silicide compound is that titanium silicide suffers from size effects. As the volume of a titanium silicide region in a semiconductor device decreases, its contact resistance increases. Thus, as semiconductor devices shrink, particularly the length of a gate in a semiconductor device, the use of titanium silicide may become unacceptable due to resulting high contact resistances. Because of the susceptibility to size effects of titanium silicide, cobalt and nickel are sometimes used as alternatives. In contrast to titanium silicide, cobalt silicide and nickel silicide do not suffer size effects and have a relatively constant resistance for varying volumes of the resulting silicide compound.
Although the use of cobalt or nickel in a silicidation process offers benefits over the use of titanium, their use is not without disadvantages. For example, the use of cobalt or nickel can result in current leakage into the silicon substrate. Such current leakage can be detrimental. In addition, the use of cobalt or nickel, although providing relatively constant contact resistance for varying volumes of silicide, has resulted in greater than expected contact resistances.
What is needed is a contact having reduced contact resistance that does not require specialized materials. Additionally, a method for fabricating a contact having reduced contact resistance is needed that does not add specialized materials or costly steps to the fabrication process.
SUMMARY OF THE INVENTION
Accordingly, a need has arisen for a semiconductor device having reduced contact resistance. The present invention


REFERENCES:
patent: 6670670 (2003-12-01), Chae et al.

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