IC tester having region in which various test conditions are...

IC testing apparatus and method

IC testing methods and apparatus

IC testing methods and apparatus

IC with addressable test port

IC with cache bit memory in series with scan segment

IC with expected data memory coupled to scan data register

IC with external register present lead connected to...

IC with internal interface switch for testability

IC with IP core and user-added scan register

IC with JTAG port, linking module, and off-chip TAP interface

IC with latching and switched I/O buffers

IC with protocol selection memory coupled to serial scan path

IC with protocol selection memory coupled to serial scan path

IC with scan distributor and scan collector circuitry

IC with separate scan paths and shift states

IC with serial scan path, protocol memory, and event circuit

IC with shared scan cells selectively connected in scan path

IC with TAP, STP and lock out controlled output buffer

IC with test cells having separate data and test paths