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Tail-biting turbo coding to accommodate any information...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Tail-biting turbo-code encoder and associated decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Tailbiting decoder and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Tamper resistant shadow memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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TAP and linking module for scan access of multiple cores...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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TAP and shadow port operating on rising and falling TCK

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Tap and test controller with separate enable inputs

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Tap demultiplexer with select and select one outputs for HTML

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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TAP domain selection circuit with AUXI/O1 or TDI lead

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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TAP interface outputs connected to TAP interface inputs

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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TAP IR control with TAP/WSP or WSP DR control

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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TAP IR control with TAP/WSP or WSP DR control

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Tap multiplexer

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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TAP sampling at double rate

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Tap time division multiplexing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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TAP with control circuitry connected to device address port

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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TAP with enable input gated and multiplexed mode select

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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TAP with select output from one of IR and DR

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Tap with separate scan cell in series with instruction register

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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TAP, ST, lockout, and IR SO enable output data control

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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