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Jitter applying circuit and test apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
Reexamination Certificate

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Jitter injection circuit, pattern generator, test apparatus,...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Jitter producing circuitry and methods

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
Reexamination Certificate

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Jitter tolerance testing apparatus, systems, and methods

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
Reexamination Certificate

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Joint detector for multiple coded digital signals

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Joint multiple program error concealment for digital audio...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Joint range reject automatic repeat request protocol

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Joint test action group (JTAG) tester, such as to test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Jointly coded cooperative networking

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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JTAG boundary scan cell with enhanced testability feature

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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JTAG bus communication method and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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JTAG bus communication method and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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JTAG circuit transferring data between devices on TCK terminals

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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JTAG circuit transferring data between devices on TMS terminals

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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JTAG controlled self-repair after packaging

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate

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JTAG instruction register and decoder for PLDS

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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JTAG interface

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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JTAG interface device of mobile terminal and method thereof

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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JTAG interface using existing I/O bus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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JTAG mirroring circuitry and methods

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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