IC with JTAG port, linking module, and off-chip TAP interface

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Reexamination Certificate

active

07346821

ABSTRACT:
An IC includes an IEEE 1149.1 standard test access port (TAP) interface and an additional Off-Chip TAP interface. The Off-Chip TAP interface connects to the TAP of another IC. The Off Chip TAP interface can be selected by a TAP Linking Module on the IC.

REFERENCES:
patent: 6378090 (2002-04-01), Bhattacharya
patent: 6408413 (2002-06-01), Whetsel
patent: 6804725 (2004-10-01), Whetsel

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