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Memory having an ECC system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory having test circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory implementation for handling integrated circuit...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Memory integrity self checking in VT/TU cross-connect

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Memory interface device and method for supporting debugging

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Memory interface with write buffer and encoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory interlace-checking method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory lifetime gauging system, method and computer program...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory LSI failure analysis apparatus and analysis method...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory management algorithm for trellis decoders

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory management method and controller for non-volatile...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory mapping for parallel turbo decoding

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
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Memory model for functional verification of multi-processor...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Memory module and memory component built-in self test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module and method for operating a memory module in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module and method of testing the same

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module and on-line build-in self-test method thereof...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module packaging test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module test system with reduced driver output impedance

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module testing apparatus and method of testing memory...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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