Memory having an ECC system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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C714S758000, C714S799000

Reexamination Certificate

active

07996734

ABSTRACT:
An error correction code system for a memory is provided. The memory is provided with a parity array that is directly accessible. An embodiment of the error correction code system includes writing and reading test data directly to the parity array. The data read from the parity array is compared with the test data written to the parity array to detect errors.

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