Test mode for a self-refreshed SRAM with DRAM memory cells
Test pattern compression for an integrated circuit test...
Test pattern generator
Test patterns to insure read signal integrity for high speed...
Test patterns to insure read signal integrity for high speed...
Test reading apparatus for memories
Test sequences generated by automatic test pattern...
Test sequences generated by automatic test pattern...
Test system for conducting parallel bit test
Testable interleaved dual-DRAM architecture for a video memory c
Tester built-in semiconductor integrated circuit device
Tester of semiconductor memory device and test method thereof
Testing a multibank memory module
Testing address lines of a memory controller
Testing and repair methodology for memories having redundancy
Testing apparatus and a testing method
Testing apparatus and testing method
Testing apparatus and testing method
Testing apparatus and testing method
Testing board for semiconductor memory, method of testing...