Tester built-in semiconductor integrated circuit device

Details Tester built-in semiconductor integrated circuit device Tester built-in semiconductor integrated circuit device

2005-11-01

2005-11-01

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C365S201000

Reexamination Certificate

active

06961883

ABSTRACT:
A terminating circuit for terminating a common data bus to a predetermined voltage level is inactivated in a test mode, a level detection circuit detects a potential of an internal test data bus line coupled to the common data bus line, and an output state of a ternary output circuit is controlled in accordance with a detection result. In a semiconductor integrated circuit device including the memory integrated together with a logic on a common semiconductor substrate, it is accurately determined whether the output state of the memory is a ternary state while operating the memory under actual operation conditions.

REFERENCES:
patent: 4464750 (1984-08-01), Tatematsu
patent: 4926363 (1990-05-01), Nix
patent: 5910181 (1999-06-01), Hatakenaka et al.
patent: 10-283777 (1998-10-01), None

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