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Bad block identifying method for flash memory, storage...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Bad page marking strategy for fast readout in memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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BCA data replay

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Buffered memory module and method for testing same

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built in self test BIST for RAMS using a Johnson counter as a so

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built-in redundancy analysis for memories with row and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built-in self test (BIST) architecture having distributed...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built-in self test for multiple memories in a chip

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built-in self test system and method for two-dimensional...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built-in self-repair of semiconductor memory with redundant...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built-in self-repair wrapper methodology, design flow and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built-in self-test (BIST) architecture having distributed...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built-in self-test (BIST) of memory interconnect

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built-in test for multiple memory circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built-in test method for content addressable memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Built-in test support for an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Burn-in mode detect circuit for semiconductor device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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