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Total configuration memory cell validation built in self...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Trading propensity-based clustering of circuit elements in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Trading propensity-based clustering of circuit elements in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Transient analysis device for analog/digital mixed circuit...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Transmission device, reception device, test circuit, and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Transparently gathering a chips multiple internal states via...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Tristate buses

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Two boundary scan cell switches controlling input to output...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Two pass multi-state parallel test for semiconductor device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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