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Monitor port with selectable trace support

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Monitoring a thermal processing system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Monitoring a thermal processing system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Monitoring the state vector of a test access port

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Monitoring the state vector of a test access port

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-bus multi-data transfer protocols controlled by a bus arbi

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Multi-clock system-on-chip with universal clock control...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-core integrated circuit with shared debug port

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-mode programmable scan flop

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-phase test point insertion for built-in self test of integ

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Multi-port scan chain register apparatus and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-stage algorithmic pattern generator for testing IC chips

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-stage data processor with signal repeater

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-stage test response compactors

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-strobe apparatus, testing apparatus, and adjusting method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-strobe circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-strobe generation apparatus, test apparatus and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-test method for using compare MISR

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Multi-user application program testing tool

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Multicore processor test method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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