Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-06-21
2005-06-21
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S386000
Reexamination Certificate
active
06908811
ABSTRACT:
A method for forming in monolithic form a DRAM-type memory, including the steps of forming, on a substrate, parallel strips including a lower insulating layer, a strongly-conductive layer, a single-crystal semiconductor layer, and an upper insulating layer; digging, perpendicularly to the strips, into the upper insulating layer and into a portion of the semiconductor layer, first and second parallel trenches, each first and second trench being shared by neighboring cells; forming, in each first trench, a first conductive line according to the strip width; forming, in each second trench, two second distinct parallel conductive lines, insulated from the peripheral layers; filling the first and second trenches with an insulating material; removing the remaining portions of the upper insulating layer; and depositing a conductive layer.
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French Search Report from French Patent Application No. 01/12377, filed Sep. 26, 2001.
Coronel Philippe
Piazza Marc
McClellan William R.
Nhu David
STMicroelectronics S.A.
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